RISC-V: Big movement on the open hardware front
Software, and by extension the digital world, has proven more fertile ground for Open Source adoption than hardware.
There are exceptions: the Open Compute Project, Arduino and 3D-printer designs. But, despite past attempts like OpenSPARC, it’s hard to make the case for there having been a successful open processor relevant to server hardware.
However, that may be changing. At the recent 2023 Summit, RISC-V International, a member organization under the Linux Foundation, shared some impressive growth stats. Membership in the organization was up 23% in 2023. Almost two billion systems-on-a-chip (SoC) incorporating the RISC-V architecture have been produced. A forecast from the SHD Group pegs that number to grow at a compound annual growth rate (CAGR) of more than 40% over the rest of this decade. Most major silicon vendors and cloud providers are exploring and adopting RISC-V. (You can catch the keynote and Sumit talks on their YouTube channel.)
What’s RISC-V and how is it different?
RISC-V was developed at the Parallel Computing Laboratory (Par Lab) of the University of California Berkeley, under the direction of Professor David Patterson. In May 2010, Prof. Krste Asanović and graduate students Yunsup Lee and Andrew Waterman initiated the development of the RISC-V instruction set. It’s a free-to-license and open processor instruction set architecture (ISA) but not a specific design that users have to adopt (or not) as is.
As RISC-V International CTO Mark Himelstein told me in a 2021 podcast: “One of the problems when you hand something whole cloth as Open Source, is it’s hard for people to really feel ownership around it. The one thing that Linux did was that everybody felt a pride of ownership. That was really hard to do.”
RISC-V was Open Source from the beginning and not tied to any single vendor. It was also designed to be extensible and implementation-agnostic. One challenge for RISC-V has been to balance the flexibility of RISC-V’s many extensions with the fragmentation they can bring. This is less of a problem in the embedded space where RISC-V had its first primary beachhead because designs there are often largely custom. It allows for the development of new embedded technologies implemented upon field-programmable gate arrays (FPGAs) as well as the manufacture of microcontrollers, microprocessors and specialized data processing units (DPUs.)
The RISC-V software ecosystem
However, as RISC-V starts to move into server designs, a greater degree of standardization becomes important. (Remember the Unix wars when each vendor’s processor and systems required a unique operating system and applications.) While RISC-V in servers is still nascent, it’s attracting attention. For example, EuroHPC is a European initiative working with RISC-V in the high-performance computing space. ISOLDE is another European project looking at high-performance RISC-V processors for automotive, space and internet of things (IoT) applications.
The primary answer to fragmentation is RISC-V profiles, a set of standardized subsets of the complete RISC-V ISA. They are designed to make sure that hardware implementers and software developers can intersect with an interface built around a set of extensions with a bounded amount of flexibility designed to support well-defined categories of systems and applications.
Linux Foundation Europe launched a related software project in May 2023: the RISC-V Software Ecosystem (RISE) Project. The focus is on accelerating the availability of software for high-performance and power-efficient RISC-V cores running high-level operating systems for a variety of market segments. This ecosystem includes software development tools (such as LLVM and GCC), virtualization support, language runtimes, Linux distribution integration (including Ubuntu, Debian, Fedora, Red Hat Enterprise Linux, and Alpine) and system software (including UEFI and ACPI.) As part of the collaborative development of software for RISC-V, RISE will work upstream first with existing Open Source communities in keeping with Open Source best practices. Another recent standardization effort is Boot and Runtime Services (BRS.) It plans to establish a specification targeting operating system and kernel environment for booting and running those operating systems on application class RISC-V machines. The specification will be used as a dependency for the OS-A Platform specification.
Moving forward
RISC-V is widely expected to continue to quickly grow its footprint in small devices. However, there’s a great deal of potential for RISC-V in larger systems, even servers, as well as continued work to integrate RISC-V with other hardware such as FPGAs. Its success, especially in some of these newer areas, will depend on a software ecosystem which is why collaboration around RISC-V in open source software will be a critical factor in its success.
Photo by Albert Stoynov on Unsplash
